NVIDIA System Design Intern LDE 2027 | Taipei
Rolling applications — apply early
| Company | NVIDIA — next-gen Datacenter, GeForce, Virtualization & Automotive platforms |
| Role | System Design Intern, LDE — 2027 · JR2021952 |
| Location | Taipei, Taiwan · hybrid |
| Focus | Lead Design Engineer (LDE) intern — system design around GPUs, DPUs, CPUs & LPUs (graphics, self-driving, servers, datacenters) |
| Eligibility | Completing bachelor’s or master’s in Electrical Engineering, Computer Science, or Computer Engineering |
| Tools | High-speed signal & power design · Multisim (or equiv.) · Cadence / Concept / OrCAD · circuit simulation & fault diagnosis |
Overview
NVIDIA is hiring a System Design Intern (LDE) for 2027 in Taipei to help develop next-generation products across Datacenter, GeForce, Virtualization, and Automotive. You’ll collaborate with key design teams pushing the frontiers of AI computing platforms.
As LDE intern you’ll drive research, design execution, bring-up, issue debugging, and manufacturing/partner release quality — serving as a main interface to Silicon, Thermal, Mechanical, SI, and EMC engineers. Work spans new features, circuits, and architecture, including industry-standard discussions implemented in next-gen product/platform development.
Key Requirements
- Eligibility: Completing a bachelor’s or master’s in EE, CS, or Computer Engineering.
- Skills: Knowledge of high-speed signal design rules and power design methodologies; proficiency in digital/analog circuit simulation and fault diagnosis; exposure to Multisim (or equivalent) and Cadence/Concept/OrCAD.
- Strengths: Circuit development, critical thinking, strong problem-solving, and clear communication/interpersonal skills.
- Nice to have: Prior hardware design experience in high-speed subsystems or DC-DC power modules; can-do attitude, leadership, fast learning, creativity, and strategic decision-making.
- Why it stands out: Hands-on LDE path on NVIDIA’s next-gen GPU/DPU/CPU/LPU platforms in Taipei; end-to-end ownership from research through manufacturing release.
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